1. Technical Field
The present disclosure relates to a semiconductor device and a method of manufacturing the same.
2. Description of the Related Art
Power switching semiconductor devices are required to have low on-state resistance to reduce power loss. From the safety point of view, the power switching semiconductor devices are strongly demanded to further possess normally-off characteristics to interrupt the current in a zero-bias condition.
Japanese Unexamined Patent Application Publication No. 2009-200395 discloses, for example, a technology to enable a GaN-based semiconductor device to have low on-state resistance and normally-off characteristics. Such semiconductor device uses, as a gate, a p-type GaN layer, below which a gate recess is further formed. The structure disclosed in Japanese Unexamined Patent Application Publication No. 2009-200395 enables a two-dimensional electron gas to disappear in a channel below the gate, and thus achieves a low on-state resistance semiconductor device with normally-off characteristics.
The p-type GaN layer is electrically highly resistive. To achieve fast switching characteristics, it is thus essential to stack the p-type GaN layer and the gate electrode on each other so that the entire gate has a low resistance. In so doing, not only the gate electrode itself, but also a contact between the p-type GaN layer and the gate electrode is required to have a low resistance.
Methods of forming a contact to a p-type GaN layer include a method that forms a gate electrode made of Ti on a surface of the p-type GaN layer. The formation of the gate electrode made of Ti enables hydrogen contained in the p-type GaN layer to be absorbed by Ti, resulting in a higher acceptor ion concentration in the vicinity of the interface. This method thus provides a semiconductor device having a low-resistance contact between the p-type GaN layer and the gate electrode.
The above-described technology, however, has a problem in that the amount of gate leakage current increases in the semiconductor device.
The present disclosure has been conceived in view of the above-described problem, and its object is to provide a semiconductor device and a method of manufacturing the same that are capable of reducing the amount of gate leakage current, while achieving normally-off characteristics and fast switching characteristics.